FPGA Engineer

We’re seeking an FPGA Engineer to design and implement high-performance, signal-processing solutions for next-generation LEO PNT satellite systems. You will focus on implementing advanced DSP and communications algorithms into efficient, resource-optimized RTL, collaborating across systems, RF, and software teams to deliver flight-ready hardware.

What You’ll Do:

• Authoring RTL: Implement acquisition, tracking, data decoding, synchronization, and measurement-processing algorithms in FPGAs (VHDL/Verilog/SystemVerilog).
• DSP Fixed-Point Design: Convert floating-point models into fixed-point micro-architecture; perform quantization analysis and optimize for performance and resource utilization.
• FPGA Optimization: Optimize designs for timing closure, latency, power, and resource efficiency (DSP slices, BRAM, LUTs).
• Verification & CI/CD: Develop testbenches, simulation toolchains (ModelSim or similar), and validate against Python/C++ reference models.
• SW Integration: Support hardware bring-up, debugging, SW integration and performance validation in the lab and within HIL environments.
• Documentation: Document RTL architecture, design trade-offs, verification results, and performance metrics.

Required Qualifications:

• MS or BS in Electrical Engineering, Computer Engineering, or related field; 3+ years of FPGA development experience.
• Strong understanding of DSP fundamentals (filters, synchronization, FFT, NCOs, correlators).
• Proficiency in VHDL/Verilog/SystemVerilog and FPGA toolchains (Xilinx/AMD).
• Experience with fixed-point modeling and bit-accurate verification.
• Good degree of comfort with simulation tools and scripting (Python, TCL, bash, or similar).

Preferred Qualifications:

• Experience with satellite communications and GNSS.
• Solid fundamentals in high-speed digital logic design and timing closure techniques.
• Experience with lab validation, test automation, and hardware debugging tools
• Experience in ARM-based MPSoC systems (Cortex-A/R), with experience developing Embedded Linux (PetaLinux/Yocto) and device drivers specifically for Zynq UltraScale+ environments.

Key Competencies:

• Strong foundation in both digital logic design and DSP with practical FPGA implementation expertise.
• Execution-focused mindset with emphasis on timing closure and hardware validation.
• Clear technical communication and documentation.
• Ability to collaborate across systems, RF, software, and navigation teams to deliver flight-ready FPGA solutions

For U.S. Roles: To comply with U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the United States (i.e. Green Card holder), or other protected individual as defined by 8 U.S.C. 1324b(a)(3).

For U.K. Roles: To comply with U.K. regulations, this role requires Baseline Personnel Security Standard (BPSS) checks, and successful candidates must be eligible to obtain UK Security Clearance (SC).

For Canada Roles: Successful candidates must obtain and hold a security clearance at the reliability status level, and pass security assessment for the Canadian Controlled Goods Program (CGP) and ITAR.