Member of Technical Staff, AMD GPU Performance Engineering
- Salary
- $200K - $400K
- Level
- Staff
- Work type
- On-site · San Francisco
- Visa
- Sponsors visas
Open. First seen 2 October 2026.
About the role
Inferact's standard text
Inferact's mission is to grow vLLM as the world's AI inference engine and accelerate AI progress by making inference cheaper and faster. Founded by the creators and core maintainers of vLLM, we sit at the intersection of models and hardware, a position that took years to build.
About the Role
We're looking for an AMD GPU performance engineer to make vLLM a first-class inference engine across the AMD accelerator ecosystem. You'll build and optimize AMD GPU backends, kernels, runtime paths, and benchmarking infrastructure using ROCm, HIP, Triton, CK, AITER, and related tooling so vLLM can deliver frontier inference performance on AMD GPUs.
You'll work at the boundary of inference systems, kernels, compilers, and hardware architecture, improving performance-critical paths such as attention, GEMM, sampling, KV cache, and communication-heavy operations. Your work will help make AMD GPU support in vLLM usable, fast, benchmarked, and maintainable.
Skills and Qualifications
Minimum qualifications:
- Bachelor's degree or equivalent experience in computer science, engineering, systems, machine learning, or similar.
- Hands-on experience optimizing AMD GPU workloads using ROCm, HIP, Triton, CK, AITER, or similar AMD ecosystem tools.
- Deep understanding of AMD GPU execution, memory behavior, toolchains, kernel performance, and backend-specific performance constraints.
- Experience optimizing ML kernels or inference paths such as attention, GEMM, sampling, KV cache, fused kernels, or communication-heavy runtime paths.
- Strong performance profiling and benchmarking skills, with the ability to use measurements, hardware counters, correctness tests, and reproducible benchmarks to guide optimization work.
Preferred qualifications:
- Experience with vLLM, SGLang, TensorRT-LLM, ROCm-based serving, or other LLM inference systems.
- Familiarity with batching, KV cache, decoding, serving tradeoffs, and backend performance constraints in production inference systems.
- Experience with compiler and kernel technologies such as Triton, MLIR, LLVM, CK, AITER, HIP, or other kernel DSLs and backend libraries.
- Knowledge of quantization methods such as INT8, FP8, mixed precision, or AMD hardware-specific numeric formats, including accuracy and performance tradeoffs.
Bonus points if you have:
- Contributed to vLLM, ROCm, HIP, Triton, CK, AITER, PyTorch, compiler projects, or other open-source ML infrastructure.
- Built AMD GPU benchmarking infrastructure or automated performance regression detection for accelerator workloads.
- Worked directly with AMD, accelerator platform teams, or early-access programs to ship backend, compiler, or inference performance improvements.
Logistics
- Location: This role is based in San Francisco, California. Will consider remote in the US for exceptional candidates.
- Compensation: Depending on background, skills, and experience, the expected annual salary range for this position is $200,000 - $400,000 USD + equity.
- Visa sponsorship: We sponsor visas on a case-by-case basis.
- Benefits: Inferact offers generous health, dental, and vision benefits as well as 401(k) company match.
What this role asks for
89% of this description is written for the role. The rest is Inferact's standard text, folded away below.
Read against Inferact's other open postings on this site.
The team: Research & Engineering HIRES STEADILY
This role is one of 23 open in Research & Engineering. 5 were posted in the last 30 days and the oldest in January: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (14 of 23), LLM (11 of 23), PyTorch (11 of 23), Kubernetes (10 of 23), Golang (9 of 23), Machine Learning (8 of 23), CUDA (7 of 23)
OTHER ROLES ON THIS TEAM
- Engineering Manager posted Oct 14
- Member of Technical Staff, Vulnerability Management posted Oct 2
- Member of Technical Staff, Forward Deployed Engineer posted Oct 2
- Member of Technical Staff, Supercomputing Infrastructure posted Sep 24
- Member of Technical Staff, Production Site Reliability Engineer posted Sep 22
- Inference Engineering, Co-op posted Sep 15
- Member of Technical Staff, Inference posted Sep 4
- Member of Technical Staff, Cloud Orchestration (Remote) posted Aug 25
- Member of Technical Staff, Supercomputing Infrastructure posted Aug 21
- Member of Technical Staff, TPU Performance Engineering posted Jun 26
- Member of Technical Staff, AMD GPU Performance Engineering posted Jun 25
- Member of Technical Staff, Performance and Scale posted Jun 24
- Member of Technical Staff, Kernel Engineering posted Jun 24
- Member of Technical Staff, Inference posted Jun 24
- Member of Technical Staff, Cloud Orchestration posted Jun 24
- Member of Technical Staff, Inference posted Jun 18
- Member of Technical Staff, Developer Relations posted Jun 17
- Member of Technical Staff, TPU Performance Engineering posted Jun 17
- Member of Technical Staff, Exceptional Generalist (Remote) posted Jan 22
- Member of Technical Staff, Cloud Orchestration posted Jan 22
- Member of Technical Staff, Kernel Engineering posted Jan 22
- Member of Technical Staff, Performance and Scale posted Jan 22
From the team and dates on Inferact's own job board.
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