Emulation Engineer
- Salary
- $160,000 - $275,000
- Level
- Mid
- Work type
- Hybrid · Mountain View
Not stated in the posting: visa.
Open. First seen 2 October 2026.
About the role
What MatX Is Building
MatX is on a mission to be the compute platform for AGI. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the largest ML workloads for AGI. MatX is seeking Emulation engineers to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for these roles will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies.
We're hiring a Senior/Staff Emulation Engineer to build the infrastructure, flows, and debug methodology behind our advanced connectivity SoCs. The role sits in the Emulation team, but the impact is broader: you'll create reusable flows that span emulation, SoC simulation, firmware/software bring-up, and post-silicon validation.
We're looking for a multi-disciplinary engineer with an out-of-the-box, can-do mindset — someone who sees a gap and builds the bridge, comfortable moving between RTL, software, tooling, system debug, and vendor flows. You don't need to be an expert in every area listed below. You do need a reuse-first mindset, strong software instincts, and the ability to learn quickly across boundaries.
What You'll Do Here
- Define and execute emulation strategy and test plans for complex connectivity SoCs.
- Bring up and debug large-scale models on commercial emulation platforms such as Cadence Palladium, Zebu or Veloce.
- Integrate external components such as SpeedBridge and VirtualBridge adapters, Accelerated VIP, and memory models — for PCIe, HBM4, Ethernet, AXI/AMBA, JTAG, and (Q)SPI. And build custom transactors where needed.
- Develop HW/SW co-emulation and co-simulation flows using RTL, software/reference models (Rust, C/C++, SystemC), firmware, and software tests.
- Build reusable transactors, agents, stubs, bridges, checkers, and acceleration flows — including developing new transactors and agents from scratch when off-the-shelf options don't fit.
- Drive emulation speed-ups and resource utilization — compile-time reduction, partitioning, clocking strategy, regression scheduling, multi-user capacity, and waveform/trace management.
- Build automation for regression triage, debug, model usability, and engineering productivity.
- Go beyond prompting with AI — build practical LLM-based tooling for log analysis, waveform triage, debug assistance, and flow generation, including custom skills, agents, rules, and workflows that fit our engineering stack.
- Collaborate with architecture, RTL, DV, SoC, firmware, driver, kernel, validation, and EDA/vendor teams.
Who You Are
- Strong hands-on experience with SoC emulation or system-level validation.
- Experience with at least one commercial emulation platform, such as Palladium.
- Working Verilog/SystemVerilog and waveform-debug skills — enough to develop a custom transactor or agent when needed (with or without AI assistance). Deep RTL design expertise is not required.
- Strong software and automation skills — Python plus one or more of C, C++, Rust, Tcl, or shell.
- Demonstrated ability to build tools and infrastructure, not just run existing flows.
- Strong system-level debug instincts spanning RTL, firmware, and software.
- Ability to work independently and across functional and team boundaries.
Bonus Points If You Have
- UVM or hybrid SoC testbench development.
- Integrating cycle-accurate, software, or reference models into emulation/DV flows.
- Rust in verification or emulation flows (or strong interest in adopting it).
- Bazel or large-scale build/regression systems.
- Reusable stimulus across simulation, emulation, and post-silicon.
- AI/LLMs used to build real engineering tools — debug, triage, flow generation — beyond chat prompting.
- Connectivity SoCs, PCIe/CXL, Ethernet, DMA, HBM/memory subsystems, chiplets, or interconnect fabrics.
- Firmware or driver bring-up on emulation platforms.
- Scaling emulation or verification infrastructure across multiple projects or product lines.
Compensation
The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation.
- Early Career - $160,000 - $275,000 + equity
- Mid Career - $175,000 - $400,000 + equity
- Senior Career - $250,000 - $600,000 + equity
What We Offer
- Time off: 4 weeks PTO (accrued) + 12 company Holidays + up to 3 weeks remote work
- Health: Company-subsidized Medical (Kaiser or Anthem) for employees & dependents, Guardian Dental and Vision insurances for employee & dependents, and life insurance (employee only), plus HSA and FSA offerings via Lively.
- Financial Security: Choose from Roth or pre-tax 401K (or both) with a 5% company contribution (even if you don't contribute), 100% company-paid life insurance (up to $300K), long-term disability and travel insurance.
- Professional Development: $1500 per year Professional Development Budget
- Team Meals: MatX provides onsite team lunch & dinner Monday - Friday, with your choice of ordering via WeBox, Specialty’s or via our reimbursement system
- Commute on Us: We pay 100% for your daily commute. Commute via our company rideshare account, reimburse public transportation, or get a Fasttrak card (or all three)
- MatX E[x]tras: $50/mo to use on the perk you value most
- Cell & Internet Reimbursement: $35/mo for cellular and $40/mo for wifi
- Remote Home Setup: Use our Amazon business account for up to $1000 in office setup purchases.
- Mental Wellbeing: 100% paid mental health benefit via SpringHealth and Guardian EAP.
- Support to Parents: Up to 12 weeks paid parental leave regardless of path to parenthood, 10 weeks pregnancy disability leave, flexible return-to-work hours, and a $6K Family Fund to cover fertility, surrogacy, adoption, menopausal health, preservation, family counseling and more.
MatX's standard text
As part of our dedication to the diversity of our team and our focus on creating an inviting and inclusive work experience, MatX is committed to a policy of Equal Employment Opportunity and will not discriminate against an applicant or employee on the basis of race, color, religion, creed, national origin or ancestry, sex, gender, gender identity, gender expression, sexual orientation, age, physical or mental disability, medical condition, marital/domestic partner status, military and veteran status, genetic information or any other legally recognized protected basis under federal, state or local laws, regulations or ordinances.
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This position requires access to information that is subject to U.S. export controls. This offer of employment is contingent upon the applicant's capacity to perform job functions in compliance with U.S. export control laws without obtaining a license from U.S. export control authorities.
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MatX does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to our hiring managers or People team and any resumes submitted are deemed to be the property of MatX.
What this role asks for
Particular to this role
Bazel · Golang
Rare in MatX's other 36 open postings.
Standard for software engineering roles
Python
Common in software engineering postings at any company.
82% of this description is written for the role. The rest is MatX's standard text, folded away below.
Read against MatX's other open postings on this site.
The team: Hardware HIRES STEADILY
This role is one of 30 open in Hardware. 6 were posted in the last 30 days and the oldest in February: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Generative AI (18 of 30), Python (18 of 30), C (10 of 30), Verilog (10 of 30), C++ (8 of 30), Embedded Systems (8 of 30), Rust (7 of 30)
OTHER ROLES ON THIS TEAM
- Hardware Lab Manager posted Oct 17
- Methodology Engineer (Silicon) posted Oct 7
- IT Support Engineer (Onsite) posted Oct 1
- Bluespec Design Engineer (Haskell) posted Sep 25
- SOC Integration Engineer posted Sep 23
- Firmware Engineer - Platform & Board Management posted Sep 21
- System Software Engineer, Linux Driver and Driver Adjacent posted Sep 17
- Security Engineer posted Sep 16
- Infrastructure Engineer posted Sep 15
- Developer Infrastructure Engineer (Silicon) posted Sep 14
- Design Verification Engineer - Compute posted Sep 11
- Technical Program Manager, Silicon/Hardware posted Sep 10
- NPI Manufacturing Engineer - AI Compute Hardware posted Aug 28
- PCB Layout Engineer - AI Compute Hardware posted Aug 28
- Mechanical Engineering Lead - AI Rack Scale Systems posted Aug 28
- Mechanical Engineer - AI Rack Scale Systems posted Aug 28
- Silicon Validation Engineer posted Jul 28
- Senior SoC Power Analysis & Optimization Engineer posted Jul 22
- Design Verification Engineer posted Jul 15
- Micro-Architect and RTL Designer posted Jun 15
- Hardware System Diagnostic Engineer posted May 26
- SOC Micro-Architect and RTL Designer posted May 19
- Formal Verification Engineer posted May 19
- Rust SW-Silicon Co-verification Engineer posted Apr 13
- Power Engineer posted Jan 27
- Silicon Design-for-Test (DFT) Engineer posted Dec 19
- ASIC/SOC CAD Engineer posted Mar 12
- ASIC/SOC Silicon Physical Design Engineer posted Feb 16
- SoC Design Verification Engineer posted Feb 16
From the team and dates on MatX's own job board.
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