Research Engineer - Mid-Training

Mid Training

You will train frontier models to become highly knowledgeable semiconductor design and verification experts that serve as the foundation for reinforcement learning and automated chip development. You will develop methods for generating and curating synthetic design data, performing model distillation, and enabling continual learning at scale. You will work closely with hardware engineers, RL researchers, and verification specialists to create evals that guide design data quality and model improvement.

You will collaborate with compute engineers to scale efficient training across thousands of GPUs and RL environments. You will build high-performance tools to investigate how data and simulation shape model-driven design intelligence.

You might thrive in this role if you have experience with

• Training LLMs or foundation models on semiconductor design and verification corpora (e.g., RTL, netlists, PDKs, simulation logs)
• Modeling design scaling laws and optimizing compute budgets for chip-design-specific workloads
• Generating large-scale synthetic design data (e.g., RTL variants, testbenches, verification traces)
• Building evals that correlate with downstream design metrics (e.g., timing closure, power, area, verification coverage)