← All jobs
Sapsol Technologies Inc

R&D Engineer

Mountain View
Level
Mid

Not stated in the posting: salary, work type, visa.

Open. First seen 3 October 2026.

About the role

Responsible for

  • Validate and sanity check existing FPGA protoyping design on hardware.
  • Migrate and optimize existing FPGA prototyping designs to all Synopsys hardware platforms.
  • Create and edit user documents
  • Work in the lab to conduct hardware experiment including maintaining setups and equipment

Responsible for establishing personal timetables according to task assignment and supporting the related assigned project goals of other engineers.

Responsible for

  • Validate and sanity check existing FPGA protoyping design on hardware.
  • Migrate and optimize existing FPGA prototyping designs to all Synopsys hardware platforms.
  • Create and edit user documents
  • Work in the lab to conduct hardware experiment including maintaining setups and equipment

Responsible for establishing personal timetables according to task assignment and supporting the related assigned project goals of other engineers.

What this role asks for

Particular to this role

FPGA

Rare in Sapsol Technologies Inc's other 169 open postings.

Read against Sapsol Technologies Inc's other open postings on this site.

Similar jobs

Is this your posting and you want it taken down? Email info@careerholo.com.