Senior Analog & Mixed-Signal IC Designer
- Level
- Senior
Not stated in the posting: salary, work type, visa.
Open. First seen 3 October 2026.
About the role
Role Overview
We are seeking a highly experienced Senior or Staff Analog/Mixed-Signal IC Designer to join a world-class semiconductor team. The ideal candidate brings deep expertise in high-speed analog circuit design—spanning wireline transceivers, RFIC front-ends, and precision data converters—and has a track record of delivering silicon in advanced FinFET or SOI processes. This is a high-impact individual contributor or technical lead role focused on next-generation silicon for data communications, wireless, and compute applications.
Key Responsibilities
- Design and verify high-speed analog and mixed-signal circuits including ADCs, DACs, PLLs, clock distribution, laser/modulator drivers, and transimpedance amplifiers (TIAs).
- Architect and implement wireline SerDes front-ends, optical interconnect ICs, and multi-GHz analog signal chains from concept through tape-out.
- Develop transistor-level schematics and layouts in advanced FinFET (7–16 nm) or SOI technologies; collaborate with layout engineers to meet stringent PPA targets.
- Drive pre-silicon simulation and post-silicon bring-up; analyze measured silicon data and iterate on design to close specification gaps.
- Partner with digital, CAD, and systems teams to define mixed-signal partitioning, interface specs, and shared design methodologies.
- Produce detailed design documentation and present technical progress to cross-functional stakeholders and leadership.
- Mentor junior designers and contribute to best-practice development across the organization.
Required Qualifications
Education & Experience
- Ph.D. in Electrical Engineering (or related) with 6+ years of analog/mixed-signal IC design experience, OR
- MS. in Electrical Engineering (or related) with 8+ years of analog/mixed-signal IC design experience.
Core Technical Skills
- Analog / high-speed circuit design: wideband amplifiers, comparators, bias networks, ESD-tolerant I/Os.
- Laser/modulator drivers and transimpedance amplifiers (TIAs) for optical interconnect applications.
- High-speed ADC and DAC design (pipeline, SAR, flash, current-steering); including low-speed (LS) converters for control and calibration planes.
- Clocking systems: DLLs, resonant/CMOS clock distribution, fractional-N synthesis, jitter budgeting, oscillators (LC/Ring).
- Hands-on design in advanced FinFET nodes (TSMC / Samsung 5–16 nm) and/or Silicon-On-Insulator (SOI) processes.
Preferred Qualifications
- RFIC design experience: LNA, mixer, PA driver, Broadband amplifiers, RF front-end modules.
- Familiarity with high-speed wireline PHY architectures (56G / 112G PAM-4 SerDes, NRZ).
- Background in optical module ICs (TOSA/ROSA driver ASICs, coherent DSP interfaces).
- Proficiency with Cadence Virtuoso, Spectre / APS / Ultrasim, and industry-standard layout tools.
- Proficient in designing RF passives like transmission lines, inductors, Tcoils, etc using EM tools like EMX, Peakview, etc.
- Lab characterization skills: oscilloscopes, VNAs, spectrum analyzers, BERT setups.
- Publications or patents in analog/mixed-signal IC design are a plus.
The team: External - Client Requirement HIRES STEADILY
This role is one of 14 open in External - Client Requirement. 9 were posted in the last 30 days and the oldest in July: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
CI/CD (9 of 14), AWS (7 of 14), Python (7 of 14), Agile (6 of 14), GitHub (6 of 14), Azure (5 of 14), Terraform (5 of 14)
OTHER ROLES ON THIS TEAM
- Staff Platform Engineer posted Oct 14
- Principal Platform Engineer posted Oct 14
- Confluence Solution Architect (French-speaking) posted Oct 12
- Atlassian Cloud Migration Engineer posted Oct 8
- Senior CMDB / ITOM Architect posted Oct 6
- Senior Full stack Developer posted Oct 6
- Full stack Developer posted Sep 21
- Junior DevSecOps Engineer posted Sep 21
- DevSecOps Engineer posted Sep 21
- Technical Lead, eDiscovery Products posted Sep 16
- Principal Full Stack Engineer posted Sep 11
- Principal AI Engineer posted Sep 11
- Product Manager- Workflows posted Aug 11
From the team and dates on Phizenix's own job board.
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