Sr. Hardware Design Engineer/Signal Integrity/FPGA
- Level
- Senior
Not stated in the posting: salary, work type, visa.
Open. First seen 9 October 2026.
About the role
Title: Sr. H/W Design Engineer/Signal Integrity
Terms: Contract/Potential Perm
Location: Hybrid: San Diego, Ca
Start Date: ASAP
Required: US Citizenship or Green Card Holder Only
Requirements
- Experience designing complex digital boards with higher end SoC type FPGAs from
- Altera, Xilinx, MicroSemi
- Experience with high speed signals and devices (USB, 10G Enet, DDR4, GigaBit IOs on FPGAs)
- Power supply design for high-end microprocessors and FPGA
- Signal and Power Integrity experience and simulation tools
- Experience with Altium
- EMC certification experience
- Military and Space Design experience
- Security Clearance: Nice To Have!
Benefits
A2e Technologies is an equal opportunity employer and federal contractor. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex (including pregnancy, sexual orientation, and gender identity), national origin, disability, protected veteran status, or any other characteristic protected by applicable law.
A2e Technologies's standard text
If you are a qualified individual with a disability or a protected veteran and need a reasonable accommodation to complete any part of the application process, please contact hr@a2etechnologies.com.
***No Recruiters Please***
- A2e Does NOT work with Staffing Firms,
- A2e Does NOT Accept Unsolicited Resumes,
- A2e will NOT pay a fee for any placement resulting from the receipt of an unsolicited resume.
What this role asks for
Particular to this role
Altium · iOS
Rare in A2e Technologies's other 8 open postings.
85% of this description is written for the role. The rest is A2e Technologies's standard text, folded away below.
Read against A2e Technologies's other open postings on this site.
The team: A2e
This role is one of 5 open in A2e.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
FPGA (3 of 5), Altium (2 of 5), Embedded Systems (2 of 5), Linux (2 of 5), Networking (2 of 5), Verilog (2 of 5), VHDL (2 of 5)
OTHER ROLES ON THIS TEAM
- SR. FPGA Design Engineer w/Active Clearance posted Sep 1
- Lead Hardware Engineer posted Aug 26
- Lead Embedded Software Networking Engineer- Hybrid in San Diego posted Aug 19
- Lead Embedded Software Engineer- Hybrid In San Diego posted Aug 19
From the team and dates on A2e Technologies's own job board.
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