Chip Simulation Software Engineer

Job Summary

We are seeking highly motivated and detail-oriented software engineers to join our chip simulation team. We’re building custom AI inference chips that leverage tight hardware-software co-design to deliver world-best performance. The chip simulation team plays a key role in hardware-software co-design, enabling early development of the full software stack. As an engineer on this team, you will design, develop, and test simulations of our custom hardware. You will be working at the cutting edge of hardware innovation.

Key responsibilities

• Design, develop, and maintain simulations of our hardware. Ensuring high levels of accuracy, efficient debugging, and optimal performance.
• Influence architectural decisions through review and co-design
• Create and maintain test plans, work with hardware teams to validate their documentation.
• Build tools to debug simulations, and enable developers to debug software running on the simulator.

You may be a good fit if you have

• Proficiency in C/C++
• Strong understanding of low-level software engineering.
• Strong understanding of hardware engineering.
• Excellent communication and collaboration skills.

Strong candidates may also have experience with (Nice-to-have qualifications)

• Experience developing hardware or system simulations (e.g., SystemC, gem5, QEMU, or custom frameworks).
• Experience with custom ML hardware accelerators (e.g., Google TPU)
• Experience with firmware, kernel and driver development (e.g., Linux, FreeRTOS)
• Experience with hardware development and verification.
• Experience with multiprocessing and multithreading.
• Familiarity with bit-accurate numerics modeling.
• Experience with performance profiling and optimization of simulation code
• Proficiency with Python for test harness development, bazel, and git.

Representative projects

• Implement a simulation of our on-chip modules.
• Integrate simulated chips with simulated hosts (QEMU), enabling Kernel driver development and host software testing.
• Integrate multiple simulated chips to validate multi-chip software scale-out and scale-up approaches.
• Work closely with our software teams in debugging early software deliverables.

Benefits

• Medical, dental, and vision packages with generous premium coverage
• $500 per month credit for waiving medical benefits
• Housing subsidy of $2k per month for those living within walking distance of the office
• Relocation support for those moving to San Jose (Santana Row)
• Various wellness benefits covering fitness, mental health, and more
• Daily lunch + dinner in our office
• Unlimited compute budget subject to ROI justification

How we’re different

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.