Pipeline_ MTS_Platform Architect

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem.

BE PART OF BUILDING THE FUTURE.

What do NASA and emerging space companies have in common with COVID vaccine R&D teams, or with Roblox and the Metaverse? The answer is data. Fast-moving, fast-growing industries all rely on data for a competitive edge, and the most advanced companies are getting the full data advantage by partnering with Everpure. Everpure’s vision is to redefine the storage experience and empower innovators by simplifying how people consume and interact with data. With thousands of customers, including more than half of the Fortune 500, we’ve only scratched the surface of our ambitions.

Everpure is blazing trails and setting records:

Gartner has named us a Leader in the Magic Quadrant year after year
Our customer-first culture and unwavering commitment to innovation have earned us a certified Net Promoter Score in the top 1% of B2B companies globally
Industry analysts and press applaud our leadership across these dimensions

If you, like us, say “bring it on” to exciting challenges that change the world, we have endless opportunities where you can make your mark.

WHAT YOU'LL DO

Own the platform software architecture for New Product Introduction (NPI) programs across FlashArray and FlashBlade, from concept and ERD/PRD review through bring-up, validation, manufacturing handoff and GA.
· Define and drive the platform security architecture, including Platform Root of Trust (PRoT), UEFI Secure Boot, Platform Firmware Resilience (PFR), TPM, measured boot, device identity and attestation, and boot drive encryption.
· Extend the secure boot chain of trust across firmware, bootloaders, kernel, Purity software and devices (BMC, NICs, HBAs, drives). Work with the security team on key management, the signing infrastructure and the production vs. development provisioning flows.
· Drive the post-quantum cryptography (PQC) readiness roadmap for platform firmware and boot, and keep us aligned with industry frameworks such as OCP Security / SAFE, NIST SP 800-193 and NIST SSDF.
· Architect secure, resilient firmware update and lifecycle flows: fw_update_tool, factory images, manufacturing provisioning and lock, RMA and re-provisioning, and non-disruptive hardware upgrades.
· Lead early hardware bring-up and debug for new CPUs, chipsets, PCIe switches, NICs and add-in cards. Partner with silicon vendors (Intel, AMD, Broadcom, Marvell and others) and with ODM/JDM partners.
· Shape the long-term direction for unifying hardware-adjacent management layers (chassis manager, HAL, BMC interfaces) across FlashArray and FlashBlade.
· Review hardware designs, ERDs and requirements so that platform software, diagnostics and manageability are designed in from day one, not bolted on later.
· Work with BMC Firmware, Kernel IO, Diags, Systems Networking, Hardware, Manufacturing, Security and Program Management teams in Bengaluru, Silicon Valley and Prague.
· Own root-cause analysis for the hardest platform, boot and security escalations, from internal test through customer field issues.
· Write the design documents and architectural reviews that set standards for the org. Mentor senior engineers and raise the technical bar across teams.

WHAT YOU BRING

15+ years of experience in platform, system or firmware software for servers, storage, networking or other enterprise systems.
· A proven track record as the technical lead or architect on multiple NPI programs taken from bring-up to production.
· Deep, hands-on expertise in platform security: UEFI Secure Boot, hardware root of trust, TPM 2.0, measured boot, and code-signing and key-management workflows. Experience with Intel PFR, Caliptra, OpenTitan or a similar RoT is a strong plus.
· Strong understanding of the x86 boot flow (BIOS/UEFI, bootloaders, Linux kernel boot), plus experience working with BIOS vendors and silicon reference code.
· Solid knowledge of BMC and out-of-band management (IPMI, Redfish, PLDM, MCTP, SPDM).
· Strong knowledge of hardware interfaces and system architecture: PCIe Gen5/Gen6, I2C/SMBus, SPI, eSPI, CPLD/FPGA interactions, CPU/NUMA architecture.
· Strong Linux systems programming and kernel/driver experience. Expert-level C, plus proficiency in Python and shell.
· Excellent debugging skills across hardware/software boundaries using JTAG, logic and protocol analyzers, serial consoles, crash dumps and boot logs.
· Experience working directly with silicon vendors, ODM/JDM partners and manufacturing teams.
· Proven ability to lead and influence through technical credibility across distributed teams without direct authority.
· Bachelor’s or higher in Computer Science, Computer Engineering or Electrical Engineering.
· Good to have: knowledge of PQC algorithms and migration, Common Criteria / FIPS certification, OCP standards, and ARM-based platforms.
· Storage experience is desirable but not required.
· You are flexible, accountable and a strong communicator who thrives in a globally distributed team.