Electrical Engineer, Silicon Reliability Test (Starlink)
- Level
- Junior
Not stated in the posting: salary, work type, visa.
Open. First seen 12 August 2026.
About the role
SpaceX's standard text
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
ELECTRICAL ENGINEER, SILICON RELIABILITY TEST (STARLINK)
As an electrical engineer on the Starlink silicon reliability team, you'll sit at the intersection of electrical, packaging, semiconductor, and manufacturing engineering. You will be responsible for package-level and wafer-level reliability testing, including HTOL and other accelerated life tests, root cause of silicon and packaging failures, and driving design and process changes to improve microelectronics reliability across Starlink devices. Your focus will be on the qualification of new silicon packages, wafer-level reliability, and supporting high-volume production.
RESPONSIBILITIES:
- Own package-level (HTOL, LTOL, etc.) and wafer-level (TDDB, ECM, etc.) reliability qualification and testing of new silicon designs and manufacturing technologies for high-volume production
- Plan, develop, execute, and analyze reliability test campaigns aligned with JEDEC and related standards
- Develop and procure custom test hardware, fixturing, burn-in boards, and environmental chambers/systems required for package-level and wafer-level reliability testing
- Design and develop PCBs and electrical interfaces for reliability test fixtures, sockets, and monitoring systems
- Develop software, automation scripts, and data acquisition tools (e.g., Python) to control test equipment, log telemetry, perform real-time monitoring, and analyze large reliability datasets
- Perform hands-on debugging and electrical characterization to drive root cause and corrective action of silicon, package, and interconnect failures observed in reliability testing, production, or the field
- Utilize advanced diagnostic and test tools (oscilloscopes, power supplies, vector network analyzers, custom firmware/scripts, thermal chambers, etc.) to characterize devices under stress and isolate failure mechanisms
- Run reliability failure investigations, coordinating efforts across silicon design, packaging, manufacturing, and reliability teams, and communicating findings to leadership
- Analyze reliability data (Weibull, acceleration models, etc.) to predict field performance, document failure modes, and drive design/process improvements for higher yield and reliability
- Partner with design, packaging, software, test, and manufacturing engineering teams to deliver reliable silicon hardware by informing product design, package selection, process changes, and test coverage
BASIC QUALIFICATIONS:
- Bachelor’s degree in electrical engineering, electronics engineering, or other engineering discipline
PREFERRED SKILLS AND EXPERIENCE:
- 1+ years of experience in semiconductor reliability, packaging reliability, consumer electronics, aerospace, automotive, or similar high-reliability industry
- Masters degree or PhD in electrical engineering, electronics engineering, or a related field with a focus on semiconductors, characterization, or test
- Hands-on experience with HTOL or other accelerated life tests for packages or TDDB, EM, HCI, and other wafer-level tests
- Experience developing or procuring custom test hardware, burn-in boards, sockets, or fixturing for reliability testing
- Experience designing PCBs for test fixtures or high-reliability applications
- Familiarity with programming and automation/scripting languages (Python preferred; C++, SQL, or similar) for test control, data logging, and analysis
- Proficiency in understanding PCB schematics, layout tools, and electrical interfaces for semiconductor packages
- Knowledge of JEDEC (JESD22), AEC-Q200/AEC-Q100, MIL-STD-202/883, IPC, or related reliability standards and physics-of-failure methods
- Experience in a fast-paced, iterative design/manufacturing environment within semiconductor, consumer electronics, aerospace, automotive, or related industries
ADDITIONAL REQUIREMENTS:
- Ability to work overtime and weekends as needed
ITAR REQUIREMENTS:
- To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX's standard text
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.
What this role asks for
Particular to this role
PCB Design
Rare in SpaceX's other 299 open postings.
Standard for embedded / hardware roles
C++ · Embedded Systems · Python
Common in embedded / hardware postings at any company.
80% of this description is written for the role. The rest is SpaceX's standard text, folded away below.
Read against SpaceX's other open postings on this site.
The team: Starlink Process Engineering
This role is one of 12 open in Starlink Process Engineering.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (6 of 12), C++ (3 of 12), ANSYS (2 of 12), C (2 of 12), MQTT (2 of 12), PCB Design (2 of 12), PLC (2 of 12)
OTHER ROLES ON THIS TEAM
- Sr. Failure Analysis Engineer, Microelectronics (Starlink) posted Sep 1
- Hardware Reliability Technician, Microelectronics Test (Starlink) posted Aug 12
- Sr. IC Packaging Test Engineer, Silicon Technology (Starlink) posted Aug 12
- Thermal Mechanical Test Engineer, Silicon Packaging (Starlink) posted Jul 1
- Lead Automation and Controls Engineer, Silicon Technology (Starlink) posted May 5
- Sr. Facilities Engineer, Solar Cell Factory (Starlink) posted Apr 29
- Facilities Engineer, Solar Cell Factory (Starlink) posted Apr 29
- Sr. Silicon Packaging Process Engineer, Silicon Technology (Starlink) posted Apr 22
- Failure Analysis Engineer, Microelectronics (Starlink) posted Apr 9
- Automation & Controls Specialist, Silicon Process Manufacturing (Starlink) posted Mar 5
- Sr. Fluids Systems Engineer, Solar Cell Factory (Starlink) posted Mar 5
From the team and dates on SpaceX's own job board.
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