AI Core DV Engineer
- Salary
- $180,000 - $275,000
- Level
- Senior
Not stated in the posting: work type, visa.
Open. First seen 3 October 2026.
About the role
About the role
Own verification of our AI compute core - tensor pipelines, MAC arrays, accumulator logic, and the compute ↔ memory interconnect. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon through scale-out.
What you'll do
- Own verification of our AI compute core - tensor pipelines, MAC arrays, accumulator logic, and the compute ↔ memory interconnect
- Use and develop AI-assisted tool flows to accelerate datapath verification timelines
What we're looking for
- 5+ years of experience verifying compute-heavy blocks (CPU (floating point), GPU, NPU, DSP, or AI accelerator)
- Abilities in arithmetic and datapath verification (tensor pipelines, MAC arrays, FP / INT accumulators)
- Proficient in C++, SystemVerilog, UVM, and Python
- Hands-on with verification methodology - constrained-random verification, coverage-driven closure, and debug across long pipelines
Preferred qualifications
- Strong understanding of numerical correctness (FP rounding, denormals, saturation) and golden-model comparison
- Familiarity with formal methods (FPV, DPV), writing custom golden models in C++ or Python
- Familiarity with a commercial formal tool like JasperGold or VC_Formal
Compensation
Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa Sponsorship
DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
DensityAI's standard text
Export Controls
Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Equal Opportunity
DensityAI's standard text
DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.
Full compensation packages are based on candidate experience and relevant certifications.
California pay range
$180,000—$275,000 USD
Compensation
Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa Sponsorship
DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
DensityAI's standard text
Export Controls
Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Equal Opportunity
DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.
What this role asks for
Particular to this role
Verilog
Rare in DensityAI's other 21 open postings.
Standard for software engineering roles
Python
Common in software engineering postings at any company.
63% of this description is written for the role. The rest is DensityAI's standard text, folded away below.
Read against DensityAI's other open postings on this site.
The team: Hardware HIRES STEADILY
This role is one of 18 open in Hardware. 1 was posted in the last 30 days and the oldest in May: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
PCB Design (5 of 18), Python (5 of 18), ANSYS (4 of 18), C++ (3 of 18), FEA (3 of 18), Altium (2 of 18), Embedded Systems (2 of 18)
OTHER ROLES ON THIS TEAM
- PCB Quality Engineer posted Oct 6
- Mechanical Engineer, Systems posted Sep 17
- Thermal Engineer posted Aug 11
- PCB Layout Engineer posted Aug 6
- Package Layout Engineer posted Aug 6
- Packaging Mechanical Engineer posted Aug 6
- Signal Integrity & Power Integrity Engineer posted Jul 2
- RTL Engineer posted Jul 1
- Product Operations Engineer posted Jun 29
- Hardware Test Engineer posted Jun 18
- Hardware Reliability Engineer posted Jun 18
- Electrical Engineer, Hardware Systems posted Jun 15
- Technical Program Manager, Hardware posted Jun 12
- Performance Verification Engineer posted Jun 2
- Physical Design Timing Engineer posted Jun 2
- Physical Design Engineer posted May 20
- Design Verification Engineer posted May 19
From the team and dates on DensityAI's own job board.
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