ASIC Design Engineer - Pixel IP
- Salary
- $129,300 - $194,700
- Level
- Mid
Not stated in the posting: work type, visa.
Open. First seen 4 October 2026.
About the role
Do you love creating elegant solutions to highly complex challenges? As part of our Hardware Technologies group, you'll help design our next-generation, high-performance, power-efficient system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and…
What this role asks for
Standard for embedded / hardware roles
C++ · Python
Common in embedded / hardware postings at any company.
Read against Apple's other open postings on this site.
Other openings for this role
3 open postings for this role in Sunnyvale, CA, first posted 4 October 2026. The company is likely hiring for more than one position. None has been taken down and posted again.
- 4 October 2026 – open
- 4 October 2026 – open
- 4 October 2026 – open (this posting)
Similar jobs
- Senior ASIC Design Verification Engineer at K2 Space
Shares 4 skills: Perl, Verilog, C++… · same country - Senior ASIC Design Verification Engineer at Palo Alto Networks
Shares 4 skills: Perl, Verilog, C++… · same country - ASIC Design Engineer (Silicon Engineering) at SpaceX
Shares 3 skills: Verilog, C++, Python · same country - Sr. ASIC Verification Engineer at Tensordyne
Shares 4 skills: Perl, Verilog, C++… · same city - Design Verification Engineer at Baidu USA
Shares 4 skills: Perl, Verilog, C++… · same city - Software Engineer - Regulatory AI & Connected Data at Apple
Also at this company
Is this your posting and you want it taken down? Email info@careerholo.com.