Senior/Principal Analog & Mixed Signal Design Engineers
- Level
- Principal
- Work type
- Hybrid · San Jose
Not stated in the posting: salary, visa.
Open. First seen 2 October 2026.
About the role
About Lumilens
Lumilens we are building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of computing—faster, cooler, and massively more efficient.
We’re a well-funded startup backed by Mayfield and led by veterans who’ve built and scaled some of the most transformative technologies in the industry. This isn’t incremental innovation's a ground-floor opportunity to rethink the optical layer from the silicon up. You’ll work alongside a team of world-class engineers solving some of the hardest challenges in optics, systems, and scale. Every line of code, every design decision, every breakthrough you help deliver will shape the infrastructure of tomorrow.
Lumilens's standard text
If you're looking for mission, momentum, and the chance to make an outsized impact—jump on the rocket ship. We’re just getting started.
Position Overview
We are seeking an experienced Analog / Mixed-Signal IC Design Engineer to design and deliver high-performance Driver and TIA circuits in BiCMOS and advanced semiconductor nodes. This role involves end-to-end ownership of analog building blocks, from architectural definition through silicon validation, in a fast-moving and technically rigorous environment. You will collaborate closely with digital, layout, and validation teams to deliver scalable, manufacturable analog IP.
Key Responsibilities
- Architect and design high-speed analog and mixed-signal circuits, including:
- Transmit drivers (linear and/or PAM-based)
- Transimpedance amplifiers (TIAs) and receiver front-ends
- Clocking and timing circuits (PLLs, DLLs, low-jitter references)
- Biasing networks, bandgaps, and on-chip power regulation
- Perform transistor-level design, simulation, and optimization across PVT corners.
- Analyze and optimize bandwidth, noise, linearity, jitter, stability, and power.
- Work closely with layout engineers on floorplanning, matching, isolation, and parasitic management.
- Define and support silicon bring-up, characterization, and debug, including correlation to simulations.
- Contribute to design methodology, IP reuse, and best practices across programs.
Required Qualifications:
- MS or PhD in Electrical Engineering or related field.
- 7+ years of hands-on analog or mixed-signal IC design experience.
- Strong fundamentals in:
- Feedback and stability analysis
- Noise and jitter modeling
- High-speed analog circuit design
- Power integrity and substrate isolation
- Experience taking Driver, TIA, or related analog blocks through tape-out and lab validation.
- Proficiency with industry-standard analog design and simulation tools.
Preferred Qualifications:
- BiCMOS (SiGe) and/or advanced CMOS nodes.
- High-speed data-path or I/O-adjacent analog circuits.
- Experience with process scaling and technology trade-offs.
- Exposure to silicon debug, failure analysis, and yield learning.
Why Join
- Deep technical ownership with visible impact.
- Opportunity to work in advanced semiconductor technologies.
- Small, focused teams with high engineering standards.
Benefits:
- Competitive salary and significant equity compensation in a rapidly growing, well-funded startup.
- Comprehensive health, dental, and vision insurance.
- Flexible time off policy.
- Direct impact on groundbreaking technology shaping the future of AI and data centers.
- Opportunity to work with a highly experienced and collaborative team.
- Dynamic and innovative work environment
- Opportunity for rapid career growth
*All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
What this role asks for
96% of this description is written for the role. The rest is Lumilens's standard text, folded away below.
Read against Lumilens's other open postings on this site.
The team: Engineering HIRES STEADILY
This role is one of 41 open in Engineering. 3 were posted in the last 30 days and the oldest in September: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (18 of 41), Embedded Systems (9 of 41), C++ (7 of 41), Test Automation (7 of 41), C (5 of 41), Linux (5 of 41), Perl (4 of 41)
OTHER ROLES ON THIS TEAM
- Analog and Mixed Signal Layout Engineer posted Oct 7
- Senior/Staff/Principal IC Layout Engineer – Optical Engine Silicon posted Sep 24
- IC Layout Engineer – Optical Engine Silicon posted Sep 24
- Senior / Staff ATE Test Engineer – Optical Transceiver Silicon posted Sep 16
- ATE Test Engineer – Optical Transceiver Silicon posted Sep 16
- Active Alignment & NPI Process Development Engineer posted Sep 9
- Senior/ Staff NPI Wafer Bumping/Fan-Out Process Engineer posted Sep 7
- DSP Engineer posted Aug 31
- Silicon Photonic Engineer posted Aug 28
- Silicon Test Engineer posted Aug 5
- Senior Director, Hardware Engineering posted Jul 31
- Senior Silicon Photonics Test Engineer (NPI) posted Jul 29
- Staff Silicon Photonics Test Engineer posted Jul 23
- Senior Silicon Photonics Test Engineer posted Jul 23
- Senior Manager, Silicon Photonics Testing and Packaging posted Jul 20
- Senior Silicon Photonics Engineer posted Jul 15
- Sr. Physical Design Engineer posted Jul 10
- IC Design Verification Engineer posted Jul 6
- IC/RTL Design Engineer posted Jul 6
- Principal Engineer Silicon Photonics posted Jun 25
- Modelling Lead (SystemC / Virtual-Platform Architect) posted Jun 24
- Modelling Lead (SystemC / Virtual-Platform Architect) posted Jun 24
- RTL Design Lead/IC Front-End Architect/Datapath Lead posted Jun 24
- RTL Design Lead/IC Front-End Architect/Datapath Lead posted Jun 24
- Optical Systems Engineer Lead posted Jun 18
- Power Integrity Engineer-Silicon posted Jun 17
- Hardware Test Engineer posted Jun 17
- Principal Mechanical Engineer posted Jun 12
- Silicon Test Engineer posted May 29
- Silicon Photonic Engineer (CPO) posted May 20
- Senior Technical Program Manager (Silicon) posted May 7
- Senior Staff Software Engineer (MES & Distribution Systems) posted Apr 17
- Director of Silicon Test Engineering posted Mar 23
- Optical Test Engineer posted Mar 22
- Advanced Package Technology Principal Engineer posted Mar 22
- IC Package FEA Engineer posted Mar 22
- Senior Signal Integrity Engineer posted Feb 4
- Signal Integrity Engineer-1.6 OSFP Board Design posted Feb 4
- Senior Software Test Automation Engineer posted Sep 25
- Systems Applications Engineer - Optical posted Sep 1
From the team and dates on Lumilens's own job board.
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