Senior Technical Program Manager (Silicon)
- Level
- Lead
Not stated in the posting: salary, work type, visa.
Open. First seen 2 October 2026.
About the role
Senior Technical Program Manager
SAN JOSE, CA / Onsite
About Lumilens
Lumilens we are building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of computing faster, cooler, and massively more efficient.
We’re a well-funded startup backed by Mayfield and led by veterans who’ve built and scaled some of the most transformative technologies in the industry. This isn’t incremental innovation's a ground-floor opportunity to rethink the optical layer from the silicon up. You’ll work alongside a team of world-class engineers solving some of the hardest challenges in optics, systems, and scale. Every line of code, every design decision, every breakthrough you help deliver will shape the infrastructure of tomorrow.
Lumilens's standard text
If you're looking for mission, momentum, and the chance to make an outsized impact jump on the rocket ship. We’re just getting started.
About the Role:
Lumilens is seeking a Senior Technical Program Manager to own and drive complex silicon tapeouts, advanced packaging, bring-up, validation, and system-level integration programs. This is a high-visibility leadership role responsible for delivering high-quality silicon, packaged solutions, and validated systems on aggressive timelines in a fast-paced, innovative environment.
Key Responsibilities
- Organize end-to-end planning, scheduling, and day-to-day execution for Lumilens’ silicon and package tapeouts, advanced packaging, bring-up, validation, and systems development programs.
- Partner with engineering leads and cross-functional teams to accurately estimate, prioritize, and sequence work while balancing quality, scope, and schedule.
- Create, maintain, and execute detailed project plans covering scope, schedule, budget, and resources, ensuring alignment with business objectives and key stakeholders.
- Proactively manage schedules, risks, issues, and quality; escalate effectively and provide clear visibility to leadership.
- Facilitate productive recurring meetings, technical reviews, and operational checkpoints throughout the project lifecycle.
- Deliver concise, targeted communications to management and stakeholders on project status, key milestones, risks, and decisions.
- Provide hands-on program management, cross-functional coordination, and internal/external stakeholder communications to achieve outstanding results.
- Own release schedules, tapeout milestones, bring-up activities, and critical program deliverables in a dynamic, high-velocity setting.
- Engage with vendors, customers, and external partners on program-related activities as required.
Qualifications
- 10+ years of experience in Silicon design, tapeout, bring-up, validation, and product qualification.
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
- Solid understanding of the silicon tapeout process (verification, signoff, mask ordering, etc.).
- Experience with product bring-up, silicon validation, and qualification flows (EVT/DVT exposure is a plus).
- Prior background in semiconductors (chip design, physical design, or test engineering preferred).
- Ability to influence without authority and drive results in a matrixed, cross-functional environment.
- Strong organizational skills with the ability to manage multiple priorities in a dynamic, fast-paced setting.
- Proficiency with program management tools such as MS Project, Jira, Asana, Smartsheet, or equivalent.
- Excellent written and verbal communication skills, including technical presentations.
Preferred Qualifications
- Strong knowledge of photonic structures, optical communication, silicon photonics, laser solutions, and heterogeneous integration.
- Experience with advanced packaging technologies (2.5D/3D integration, chiplets, silicon photonics packaging, etc.).
- Experience building program management frameworks and processes from the ground up in a startup or new business unit.
What this role asks for
Particular to this role
Jira
Rare in Lumilens's other 121 open postings.
95% of this description is written for the role. The rest is Lumilens's standard text, folded away below.
Read against Lumilens's other open postings on this site.
The team: Engineering HIRES STEADILY
This role is one of 41 open in Engineering. 3 were posted in the last 30 days and the oldest in September: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (18 of 41), Embedded Systems (9 of 41), C++ (7 of 41), Test Automation (7 of 41), C (5 of 41), Linux (5 of 41), Perl (4 of 41)
OTHER ROLES ON THIS TEAM
- Analog and Mixed Signal Layout Engineer posted Oct 7
- Senior/Staff/Principal IC Layout Engineer – Optical Engine Silicon posted Sep 24
- IC Layout Engineer – Optical Engine Silicon posted Sep 24
- Senior / Staff ATE Test Engineer – Optical Transceiver Silicon posted Sep 16
- ATE Test Engineer – Optical Transceiver Silicon posted Sep 16
- Active Alignment & NPI Process Development Engineer posted Sep 9
- Senior/ Staff NPI Wafer Bumping/Fan-Out Process Engineer posted Sep 7
- DSP Engineer posted Aug 31
- Silicon Photonic Engineer posted Aug 28
- Silicon Test Engineer posted Aug 5
- Senior Director, Hardware Engineering posted Jul 31
- Senior Silicon Photonics Test Engineer (NPI) posted Jul 29
- Staff Silicon Photonics Test Engineer posted Jul 23
- Senior Silicon Photonics Test Engineer posted Jul 23
- Senior Manager, Silicon Photonics Testing and Packaging posted Jul 20
- Senior Silicon Photonics Engineer posted Jul 15
- Sr. Physical Design Engineer posted Jul 10
- IC Design Verification Engineer posted Jul 6
- IC/RTL Design Engineer posted Jul 6
- Principal Engineer Silicon Photonics posted Jun 25
- Modelling Lead (SystemC / Virtual-Platform Architect) posted Jun 24
- Modelling Lead (SystemC / Virtual-Platform Architect) posted Jun 24
- RTL Design Lead/IC Front-End Architect/Datapath Lead posted Jun 24
- RTL Design Lead/IC Front-End Architect/Datapath Lead posted Jun 24
- Optical Systems Engineer Lead posted Jun 18
- Power Integrity Engineer-Silicon posted Jun 17
- Hardware Test Engineer posted Jun 17
- Principal Mechanical Engineer posted Jun 12
- Silicon Test Engineer posted May 29
- Silicon Photonic Engineer (CPO) posted May 20
- Senior Staff Software Engineer (MES & Distribution Systems) posted Apr 17
- Director of Silicon Test Engineering posted Mar 23
- Optical Test Engineer posted Mar 22
- Advanced Package Technology Principal Engineer posted Mar 22
- IC Package FEA Engineer posted Mar 22
- Senior Signal Integrity Engineer posted Feb 4
- Signal Integrity Engineer-1.6 OSFP Board Design posted Feb 4
- Senior/Principal Analog & Mixed Signal Design Engineers posted Dec 29
- Senior Software Test Automation Engineer posted Sep 25
- Systems Applications Engineer - Optical posted Sep 1
From the team and dates on Lumilens's own job board.
See Technical Program Manager salaries in the United States →
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