Modelling Lead (SystemC / Virtual-Platform Architect)
- Level
- Lead
Not stated in the posting: salary, work type, visa.
Open. First seen 2 October 2026.
About the role
About Lumilens
Lumilens's standard text
At Lumilens we are building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of computing faster, cooler, and massively more efficient.
We’re a well-funded startup backed by Mayfield and led by veterans who’ve built and scaled some of the most transformative technologies in the industry.
This isn’t incremental innovation, it’s a ground-floor opportunity to rethink the optical layer from the silicon up. The market is moving fast, and we’re moving faster. You’ll work alongside a team of world-class engineers solving some of the hardest challenges in optics, systems, and scale. Every line of code, every design decision, every breakthrough you help deliver will shape the infrastructure of tomorrow.
Lumilens's standard text
If you're looking for mission, momentum, and the chance to make an outsized impact, jump on the rocket ship. We’re just getting started.
About the role. You will build the executable model of the chip before silicon exists. Your architecture models will settle the decisions that are expensive to change late, including datapath latency, throughput, buffer sizing, and control-loop tuning. Your reference models will become the golden checkers the verification team scores against, and the platform will run real firmware months ahead of RTL. This is a founding, critical-path role: the virtual platform is what unblocks the firmware and architecture work in parallel with design.
What You'll Own
- A SystemC/TLM-2.0 virtual platform — MCU (ISS-backed) + peripherals + memory map + a UCIe transactor + host stub — that firmware runs on pre-RTL.
- Architecture/performance models: architectural trade studies, end-to-end datapath throughput and latency, FIFO/buffer sizing, design-space/configuration exploration.
- Golden reference models handed to DV as scoreboards.
- Behavioral models of the analog and control circuits.
- Partner with the FE architect and firmware lead to keep model, RTL, and firmware views coherent.
Required
- 8+ years in architecture/performance modelling or virtual-platform development for complex SoCs.
- Strong SystemC and TLM-2.0; solid modern C++.
- Built or led a virtual platform / ESL model that real firmware ran on for pre-silicon bring-up.
- Integrating a third-party ISS (e.g., Arm or RISC-V) into a SystemC/TLM platform; modelling buses, memory maps, and peripherals.
- Architecture/performance modelling judgment — knowing what to abstract versus model faithfully.
- Comfortable spanning hardware micro-architecture and embedded software.
Preferred
- Familiarity with High-speed serial links and die-to-die / chiplet interconnects, and link-layer concepts such as FEC and equalization (e.g. PCIe, UALink, Ethernet or memory-semantic interconnects like CXL).
- Experience feeding golden models into a UVM/DV verification flow.
- Modelling for mixed-signal or optical/SerDes systems, including control-loop / plant modelling.
- High-throughput datapath modelling.
What We Offer
- Competitive salary commensurate with experience
- Comprehensive benefits package including health, dental, and vision
- Professional development opportunities and certification support
- Access to cutting-edge technology and cloud platforms
- Collaborative work environment with cross-functional teams
Lumilens is an equal opportunity employer. All qualified applicants will receive consideration without regard to race, color, religion, gender identity, sexual orientation, veteran status, disability, or any other legally protected status.
What this role asks for
Particular to this role
C++ · Embedded Systems
Rare in Lumilens's other 121 open postings.
88% of this description is written for the role. The rest is Lumilens's standard text, folded away below.
Read against Lumilens's other open postings on this site.
The team: Engineering HIRES STEADILY
This role is one of 41 open in Engineering. 3 were posted in the last 30 days and the oldest in September: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (18 of 41), Embedded Systems (9 of 41), C++ (7 of 41), Test Automation (7 of 41), C (5 of 41), Linux (5 of 41), Perl (4 of 41)
OTHER ROLES ON THIS TEAM
- Analog and Mixed Signal Layout Engineer posted Oct 7
- Senior/Staff/Principal IC Layout Engineer – Optical Engine Silicon posted Sep 24
- IC Layout Engineer – Optical Engine Silicon posted Sep 24
- Senior / Staff ATE Test Engineer – Optical Transceiver Silicon posted Sep 16
- ATE Test Engineer – Optical Transceiver Silicon posted Sep 16
- Active Alignment & NPI Process Development Engineer posted Sep 9
- Senior/ Staff NPI Wafer Bumping/Fan-Out Process Engineer posted Sep 7
- DSP Engineer posted Aug 31
- Silicon Photonic Engineer posted Aug 28
- Silicon Test Engineer posted Aug 5
- Senior Director, Hardware Engineering posted Jul 31
- Senior Silicon Photonics Test Engineer (NPI) posted Jul 29
- Staff Silicon Photonics Test Engineer posted Jul 23
- Senior Silicon Photonics Test Engineer posted Jul 23
- Senior Manager, Silicon Photonics Testing and Packaging posted Jul 20
- Senior Silicon Photonics Engineer posted Jul 15
- Sr. Physical Design Engineer posted Jul 10
- IC Design Verification Engineer posted Jul 6
- IC/RTL Design Engineer posted Jul 6
- Principal Engineer Silicon Photonics posted Jun 25
- Modelling Lead (SystemC / Virtual-Platform Architect) posted Jun 24
- RTL Design Lead/IC Front-End Architect/Datapath Lead posted Jun 24
- RTL Design Lead/IC Front-End Architect/Datapath Lead posted Jun 24
- Optical Systems Engineer Lead posted Jun 18
- Power Integrity Engineer-Silicon posted Jun 17
- Hardware Test Engineer posted Jun 17
- Principal Mechanical Engineer posted Jun 12
- Silicon Test Engineer posted May 29
- Silicon Photonic Engineer (CPO) posted May 20
- Senior Technical Program Manager (Silicon) posted May 7
- Senior Staff Software Engineer (MES & Distribution Systems) posted Apr 17
- Director of Silicon Test Engineering posted Mar 23
- Optical Test Engineer posted Mar 22
- Advanced Package Technology Principal Engineer posted Mar 22
- IC Package FEA Engineer posted Mar 22
- Senior Signal Integrity Engineer posted Feb 4
- Signal Integrity Engineer-1.6 OSFP Board Design posted Feb 4
- Senior/Principal Analog & Mixed Signal Design Engineers posted Dec 29
- Senior Software Test Automation Engineer posted Sep 25
- Systems Applications Engineer - Optical posted Sep 1
From the team and dates on Lumilens's own job board.
Similar jobs
- System Architect, Space Electronics at Anduril Industries
Shares 2 skills: Embedded Systems, C++ · Lead level · same country - Principal Software Systems Architect at Monarch Quantum
Shares 2 skills: Embedded Systems, C++ · same country - Director, Software Quality Engineering at d-Matrix
Shares 2 skills: Embedded Systems, C++ · Lead level · same country - Technical Lead - System Tests & Diagnostics Engineer at Graphcore
Shares 2 skills: Embedded Systems, C++ · Lead level · same country - Director, Embedded Engineering at Bevi
Shares 2 skills: Embedded Systems, C++ · Lead level · same country - Senior/Staff Process Engineer (Wafer Dicing & Back-grind) at Lumilens
Also at this company
Is this your posting and you want it taken down? Email info@careerholo.com.