ATE Test Engineer – Optical Transceiver Silicon
- Level
- Mid
Not stated in the posting: salary, work type, visa.
Open. First seen 2 October 2026.
About the role
The role
Lumilens builds optical interconnect for AI data centers: silicon photonics, mixed-signal ICs, electrical-optical interposers, and the systems around them. Our silicon ships in production AI clusters today, and volume is climbing fast.
You will develop and own production test programs for our mixed-signal ICs — the SerDes, TIAs, modulator drivers, and control silicon at the heart of our co-packaged optics and pluggable transceivers. You will take test content from bring-up on the bench through to release at the OSAT, and stay with it through production.
Singapore puts you inside the assembly and test supply chain we depend on. You will be hands-on with our test partners in the region, working alongside a senior test engineer and partnering with design and validation teams across the US, India, and Singapore.
This is the role where you go from executing someone else's test plan to owning your own.
What you'll do
- Own test program development for assigned devices or blocks: build the test list against the coverage plan, and take it through wafer sort and final test insertions.
- Develop, debug, and optimize ATE test programs for mixed-signal and high-speed devices — analog and DC parameters, high-speed signal path, on-chip test points, digital scan, and firmware-driven test modes.
- Support test hardware bring-up: review load board and probe card designs, debug hardware issues in the lab, and work with vendors through first article.
- Participate in first-silicon bring-up alongside design and validation. Correlate ATE results to bench characterization, and investigate when they disagree.
- Be the day-to-day technical contact for your programs at our OSATs: release, correlation across testers and sites, multi-site and test time optimization, and production support.
- Analyze sort and final test data to find yield limiters, marginal tests, and guard-band problems. Drive the fixes on your devices and support failure analysis on returns and excursions.
- Build the reusable test IP, scripts, and data tooling that make the whole team faster.
What we're looking for
- BS/MS in Electrical Engineering, Computer Engineering, Physics, or a related field.
- 3–5 years developing production test for mixed-signal or high-speed ICs, including at least one test program you took to production release.
- Hands-on ATE experience on at least one major platform (Advantest 93K or T2000, Teradyne UltraFLEX or J750, Eagle, Chroma, or comparable).
- Strong programming: C/C++ and Python, on Linux. You write test code other engineers can read and extend.
- Solid analog and mixed-signal fundamentals — you can read a schematic, reason about a datasheet spec, and design the measurement that proves it.
- Practical test hardware skills: load board and probe card debug, bench instrumentation (scopes, BERTs, SMUs, network analyzers, VNAs), and lab troubleshooting.
- Working knowledge of optical systems and networks: how an optical transceiver works, optical power and link budgets, and high-speed serial protocols such as Ethernet and PAM4 signaling.
- Statistical fluency for yield and correlation work — JMP, MATLAB, Python/pandas, or equivalent.
- Some exposure to OSAT or subcontract test operations, and comfort working with external partners.
- Willingness to travel regionally to test sites, and to overlap with US and India hours when a bring-up or an excursion calls for it.
Preferred Qualifications
- Silicon photonics, optical transceiver, or opto-electrical test background — coupled-fiber test, optical power and wavelength measurement, TIA and driver characterization.
- High-speed SerDes test experience: BER, jitter decomposition, eye margining, loopback methods.
- DFT familiarity: scan, MBIST, JTAG/IEEE 1149, on-chip instrumentation and monitors.
- STDF and test data pipelines; building analytics that engineers actually use.
- Experience supporting a product through its first production ramp.
Why this role
Optical I/O for AI is being defined right now, and test is one of the places where it is won or lost — a part that cannot be screened economically does not ship, however good the design. The team is small, so your programs are yours: you will see your test content go from a bench setup to millions of parts, and grow into owning test architecture as we scale.
What this role asks for
Standard for QA / testing roles
Python
Common in QA / testing postings at any company.
Read against Lumilens's other open postings on this site.
The team: Engineering HIRES STEADILY
This role is one of 41 open in Engineering. 3 were posted in the last 30 days and the oldest in September: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (18 of 41), Embedded Systems (9 of 41), C++ (7 of 41), Test Automation (7 of 41), C (5 of 41), Linux (5 of 41), Perl (4 of 41)
OTHER ROLES ON THIS TEAM
- Analog and Mixed Signal Layout Engineer posted Oct 7
- Senior/Staff/Principal IC Layout Engineer – Optical Engine Silicon posted Sep 24
- IC Layout Engineer – Optical Engine Silicon posted Sep 24
- Senior / Staff ATE Test Engineer – Optical Transceiver Silicon posted Sep 16
- Active Alignment & NPI Process Development Engineer posted Sep 9
- Senior/ Staff NPI Wafer Bumping/Fan-Out Process Engineer posted Sep 7
- DSP Engineer posted Aug 31
- Silicon Photonic Engineer posted Aug 28
- Silicon Test Engineer posted Aug 5
- Senior Director, Hardware Engineering posted Jul 31
- Senior Silicon Photonics Test Engineer (NPI) posted Jul 29
- Staff Silicon Photonics Test Engineer posted Jul 23
- Senior Silicon Photonics Test Engineer posted Jul 23
- Senior Manager, Silicon Photonics Testing and Packaging posted Jul 20
- Senior Silicon Photonics Engineer posted Jul 15
- Sr. Physical Design Engineer posted Jul 10
- IC Design Verification Engineer posted Jul 6
- IC/RTL Design Engineer posted Jul 6
- Principal Engineer Silicon Photonics posted Jun 25
- Modelling Lead (SystemC / Virtual-Platform Architect) posted Jun 24
- Modelling Lead (SystemC / Virtual-Platform Architect) posted Jun 24
- RTL Design Lead/IC Front-End Architect/Datapath Lead posted Jun 24
- RTL Design Lead/IC Front-End Architect/Datapath Lead posted Jun 24
- Optical Systems Engineer Lead posted Jun 18
- Power Integrity Engineer-Silicon posted Jun 17
- Hardware Test Engineer posted Jun 17
- Principal Mechanical Engineer posted Jun 12
- Silicon Test Engineer posted May 29
- Silicon Photonic Engineer (CPO) posted May 20
- Senior Technical Program Manager (Silicon) posted May 7
- Senior Staff Software Engineer (MES & Distribution Systems) posted Apr 17
- Director of Silicon Test Engineering posted Mar 23
- Optical Test Engineer posted Mar 22
- Advanced Package Technology Principal Engineer posted Mar 22
- IC Package FEA Engineer posted Mar 22
- Senior Signal Integrity Engineer posted Feb 4
- Signal Integrity Engineer-1.6 OSFP Board Design posted Feb 4
- Senior/Principal Analog & Mixed Signal Design Engineers posted Dec 29
- Senior Software Test Automation Engineer posted Sep 25
- Systems Applications Engineer - Optical posted Sep 1
From the team and dates on Lumilens's own job board.
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